Fine-Grain Cache Resizing
نویسندگان
چکیده
Progress: We have been investigating the use of dynamic cache resizing techniques for energy reduction. The idea of cache resizing is to match the active cache size with the current program cache usage requirements. When the cache usage is small, we can turn off parts of the cache. Neither active switching energy nor static leakage energy is dissipated in the part of the cache that is turned off. Previous cache resizing techniques are designed for RAM-tag caches, where cache tags are held in RAM structures. However, commercial low-power microprocessors use CAMtag caches, where the cache tags are held in Content Addressable Memory [2, 5]. CAM-tag caches are popular in low-power processors because they provide high associativity, which avoids expensive cache misses, and results in lower overall energy [3].
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